These octal D-type edge-triggered flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs.
A buffered output-enable (OE\) input places the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without interface or pullup components.
OE\ does not affect internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
The SN54ALS374A and SN54AS374 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS374A and SN74AS374 are characterized for operation from 0°C to 70°C.
Status | ACTIVE |
SubFamily | D-type flip-flop |
Technology Family | AS |
VCC | 5.5 |
Bits | 8 |
Voltage | 5 |
F @ nom voltage | 125 |
ICC @ nom voltage | 128 |
tpd @ Nom Voltage | 9 |
3-state output | Yes |
Rating | Catalog |
Operating temperature range | 0 to 70 |
Package Group | PDIP|20 |
Package size: mm2:W x L (PKG) | See datasheet (PDIP) |
Approx. price | 1.71 | 1ku |