The \x92FCT573T devices consist of eight latches with 3-state outputs for bus-organized applications. When the latch-enable (LE) input is high, the flip-flops appear transparent to the data. Data that meets the required setup times are latched when LE transitions from high to low. Data appears on the bus when the output-enable (OE\) input is low. When OE\ is high, the bus output is in the high-impedance state. In this mode, data can be entered into the latches. The \x92FCT573T devices are identical to the \x92FCT373T devices, except for the flow-through pinout of the \x92FCT573T, which simplifies board design.
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
Products containing the "CY74FCT573T" keyword are: CY74FCT573TQC , CY74FCT573TQCT , CY74FCT573TQCT , CY74FCT573TQCTE4 , CY74FCT573TQCTG4 , CY74FCT573TS0C , CY74FCT573TSOC , CY74FCT573TSOC , CY74FCT573TSOCTStatus | ACTIVE |
SubFamily | D-type latch |
Technology Family | FCT |
VCC | 5.25 |
Bits | 8 |
Voltage | 5 |
F @ nom voltage | 70 |
ICC @ nom voltage | 0.2 |
tpd @ Nom Voltage | 8 |
3-state output | Yes |
Rating | Catalog |
Operating temperature range | -40 to 85 |
Package Group | SOIC|20 |
Package size: mm2:W x L (PKG) | [pf]20SOIC[/pf]: 132 mm2: 10.3 x 12.8 (SOIC|20) |
Approx. price | 0.31 | 1ku |