The SN74LVC540A octal buffer/driver is designed for 2.7-V to 3.6-V VCC operation.
This device is ideal for driving bus lines or buffer-memory address registers. This device features inputs and outputs on opposite sides of the package that facilitate printed circuit board layout.
The 3-state control gate is a 2-input AND gate with active-low inputs so that, if either output-enable (OE1 or OE2) input is high, all outputs are in the high-impedance state.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Status | ACTIVE |
SubFamily | Inverting buffer/driver |
Technology Family | LVC |
VCC | 3.6 |
Bits | 8 |
Voltage | 2.7^3.3 |
F @ nom voltage | 100 |
tpd @ Nom Voltage | 7.1^5.3 |
ICC @ nom voltage | 0.01 |
IOL | 24 |
IOH | -24 |
Rating | Automotive |
Operating temperature range | -40 to 125 |
Package Group | SOIC|20 |
Package size: mm2:W x L (PKG) | [pf]20SOIC[/pf]: 132 mm2: 10.3 x 12.8 (SOIC|20) |
Approx. price | 0.22 | 1ku |