This 16-bit buffer/driver is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation.
The SN74AUC16240 is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.
The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides inverting outputs and symmetrical active-low output-enable (OE)\ inputs.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
Products containing the "SN74AUC16240" keyword are: SN74AUC16240DGGR , SN74AUC16240DGGR , SN74AUC16240DGGRE4 , SN74AUC16240DGGRG4 , SN74AUC16240DGVR , SN74AUC16240DGVR , SN74AUC16240GQLR , SN74AUC16240ZQLRWidebus is a trademark of Texas Instruments.
Status | ACTIVE |
SubFamily | Inverting buffer/driver |
Technology Family | AUC |
VCC | 2.7 |
Bits | 16 |
Voltage | 0.8^1.2^1.5^1.8^2.5 |
F @ nom voltage | 250 |
tpd @ Nom Voltage | 5.9^2.6^1.8^2^1.6 |
ICC @ nom voltage | 0.02 |
IOL | 9 |
IOH | -9 |
Rating | Catalog |
Operating temperature range | -40 to 85 |
Package Group | TSSOP|48 |
Package size: mm2:W x L (PKG) | [pf]48TSSOP[/pf]: 101 mm2: 8.1 x 12.5 (TSSOP|48) |
Approx. price | 1.00 | 1ku |