This dual buffer driver is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC2G240 device is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is organized as two 1-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes data from the A input to the Y output. When OE is high, the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
Products containing the "SN74LVC2G240" keyword are: SN74LVC2G240DCT3 , SN74LVC2G240DCTR , SN74LVC2G240DCTR , SN74LVC2G240DCUR , SN74LVC2G240DCUR , SN74LVC2G240DCURE4 , SN74LVC2G240DCURG4 , SN74LVC2G240YEAR , SN74LVC2G240YZAR , SN74LVC2G240YZPR , SN74LVC2G240YZPRStatus | ACTIVE |
SubFamily | Inverting buffer/driver |
Technology Family | LVC |
VCC | 5.5 |
Bits | 2 |
Voltage | 1.8^2.5^3.3^5 |
F @ nom voltage | 150 |
tpd @ Nom Voltage | 13.7^6.8^5.8^5 |
ICC @ nom voltage | 0.01 |
IOL | 32 |
IOH | -32 |
Rating | Catalog |
Operating temperature range | -40 to 125 |
Package Group | DSBGA|8 |
Package size: mm2:W x L (PKG) | See datasheet (DSBGA) |
Approx. price | 0.15 | 1ku |