SN74AHC125 - Quadruple Bus Buffer Gates With 3-State Outputs

Updated : 2020-01-09 14:35:02
Description

The SNx4AHC125 devices are quadruple bus buffer gates featuring independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is high. When OE is low, the respective gate passes the data from the A input to its Y output.

To ensure the high-impedance state during power up or power down, OE must be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Products containing the "SN74AHC125" keyword are: SN74AHC125D , SN74AHC125D , SN74AHC125DBR , SN74AHC125DBR , SN74AHC125DBRE4 , SN74AHC125DBRG4 , SN74AHC125DE4 , SN74AHC125DG4 , SN74AHC125DGVR , SN74AHC125DGVR , SN74AHC125DR , SN74AHC125DR , SN74AHC125DRG4 , SN74AHC125DRG4 , SN74AHC125DRTI , SN74AHC125MDREP , SN74AHC125MDREP , SN74AHC125MPWREP , SN74AHC125MPWREP , SN74AHC125N
Features

  • Operating Range: 2 V to 5.5 V
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • Four Individual Output Enable Pins
  • All Inputs Have Schmitt-Trigger Action