SN74AHC126 - Quadruple Bus Buffer Gates With 3-State Outputs

The ’AHC126 devices are quadruple bus buffer gates featuring independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low. When OE is high, the respective gate passes the data from the A input to its Y output.

To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

Products containing the "SN74AHC126" keyword are: SN74AHC126D , SN74AHC126D , SN74AHC126DBR , SN74AHC126DBR , SN74AHC126DBRG4 , SN74AHC126DG4 , SN74AHC126DG4 , SN74AHC126DGVR , SN74AHC126DGVR , SN74AHC126DGVRG4 , SN74AHC126DR , SN74AHC126DR , SN74AHC126DRG4 , SN74AHC126N , SN74AHC126N , SN74AHC126NS , SN74AHC126NSR , SN74AHC126NSR , SN74AHC126PW , SN74AHC126PW

• Operating Range 2-V to 5.5-V V_CC
• Latch-Up Performance Exceeds 250 mA Per JESD 17