SN74ABT126 - Quadruple Bus Buffer Gates With 3-State Outputs

The ’ABT126 bus buffer gates feature independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low.

When V_CC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 V, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

Products containing the "SN74ABT126" keyword are: SN74ABT126D , SN74ABT126D , SN74ABT126DB , SN74ABT126DBLE , SN74ABT126DBR , SN74ABT126DBR AB126 , SN74ABT126DG4 , SN74ABT126DR , SN74ABT126DR , SN74ABT126DR (SN74ABT126 , SN74ABT126DR SOP3.9 , SN74ABT126DRE4 , SN74ABT126DRE4 , SN74ABT126DRG4 , SN74ABT126N , SN74ABT126N , SN74ABT126NS , SN74ABT126NSR , SN74ABT126NSR , SN74ABT126PW

• Typical V_OLP (Output Ground Bounce)
     <1 V at V_CC = 5 V, T_A = 25°C
• High-Impedance State During Power Up and Power Down
• High-Drive Outputs (–32-mA I_OH, 64-mA I_OL)
• I_off and Power-Up 3-State Support Hot Insertion
• Latch-Up Performance Exceeds 500 mA Per JESD 17
• ESD Protection Exceeds JESD 22
  • 2000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)