The AUP family is TIs premier solution to the industrys low-power needs in battery-powered portable applications. This family ensures a very low static- and dynamic-power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in increased battery life (see Figure 1). This product also maintains excellent signal integrity (see the very low undershoot and overshoot characteristics shown in Figure 2).
This dual 2-input positive-AND gate performs the Boolean function Y = A B or Y = A\ + B\ in positive logic.
NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
Products containing the "SN74AUP2G08" keyword are: SN74AUP2G08DCUR , SN74AUP2G08DCUR , SN74AUP2G08DCURG4 , SN74AUP2G08DQER , SN74AUP2G08DQER , SN74AUP2G08RSER , SN74AUP2G08RSER , SN74AUP2G08YFPR , SN74AUP2G08YFPR , SN74AUP2G08YZPR , SN74AUP2G08YZPRNanoStar is a trademark of Texas Instruments.
| Status | ACTIVE |
| SubFamily | AND gate |
| Technology Family | AUP |
| VCC | 3.6 |
| Channels | 2 |
| Inputs per channel | 2 |
| ICC @ nom voltage | 0.0009 |
| IOL | 4 |
| IOH | -4 |
| Input type | Standard CMOS |
| Output type | Push-Pull |
| Features | Partial Power Down (Ioff)^Over-Voltage Tolerant Inputs^Very High Speed (tpd 5-10ns) |
| Data rate | 100 |
| Rating | Catalog |
| Operating temperature range | -40 to 85 |
| Package Group | DSBGA|8 |
| Package size: mm2:W x L (PKG) | See datasheet (DSBGA) |
| Approx. price | 0.14 | 1ku |