The LPC662 CMOS Dual operational amplifier is ideal for operation from a single supply. It features a wide range of operating voltage from +5V to +15V, rail-to-rail output swing in addition to an input common-mode range that includes ground. Performance limitations that have plagued CMOS amplifiers in the past are not a problem with this design. Input VOS, drift, and broadband noise as well as voltage gain (into 100 k and 5 k) are all equal to or better than widely accepted bipolar equivalents, while the power supply requirement is typically less than 0.5 mW.
This chip is built with National's advanced Double-Poly Silicon-Gate CMOS process.
See the LPC660 datasheet for a Quad CMOS operational amplifier and LPC661 for a single CMOS operational amplifier with these same features.
Rail-to-rail output swing | |
Micropower operation (<0.5 mW) | |
Specified for 100 k and 5 k loads | |
High voltage gain | 120 dB |
Low input offset voltage | 3 mV |
Low offset voltage drift | 1.3 µV/°C |
Ultra low input bias current | 2 fA |
Input common-mode includes GND | |
Operating range from +5V to +15V | |
Low distortion | 0.01% at 1 kHz |
Slew rate | 0.11 V/µs |
Full military temperature range available |
Status | ACTIVE |
Approx. price | 1.10 | 1ku |
Number of channels | 2 |
Total Supply Voltage | 5 |
Rail-to-rail | In to V-^Out |
GBW | 0.35 |
Slew Rate | 0.11 |
Package Group | SOIC|8 |
Vos (offset voltage @ 25 C) | 3 |
Iq per channel | 0.043 |
Vn at 1 kHz | 42 |
Rating | Catalog |
Operating temperature range | -40 to 85 |
Package size: mm2:W x L (PKG) | [pf]8SOIC[/pf]: 29 mm2: 6 x 4.9 (SOIC|8) |
Offset drift | 1.3 |
Features | N/A |
Input bias current | 4 |
CMRR | 83 |
Output current | 21 |
Architecture | CMOS |
Radiation, TID | |
Radiation, SEL | |
Input common mode headroom (to negative supply) | -0.4 |
Input common mode headroom (to positive supply) | -1.9 |
Output swing headroom (to negative supply) | 0.004 |
Output swing headroom (to positive supply) | -0.013 |