SN74FB2040 - 8-Bit TTL/BTL Transceivers

The SN74FB2040 is an 8-bit transceiver designed to translate signals between TTL and backplane transceiver logic (BTL) environments.

The B\ port operates at BTL-signal levels. The open-collector B\ ports are specified to sink 100 mA. Two output enables (OEB and OEB\) are provided for the B\ outputs. When OEB is high and OEB\ is low, the B\ port is active and reflects the inverse of the data present at the A-input pins. When OEB is low, OEB\ is high, or V_CC is less than 2.1 V, the B\ port is turned off.

The A port operates at TTL-signal levels and has separate input and output pins. The A outputs reflect the inverse of the data at the B\ port when the A-port output enable (OEA) is high. When OEA is low or when V_CC is less than 2.1 V, the A outputs are in the high-impedance state.

The pins TMS, TCK, TDI, and TDO are nonfunctional, i.e., not intended for use with the IEEE Std 1149.1 (JTAG) test bus. TMS and TCK are not connected, and TDI is shorted to TDO.

BIAS V_CC establishes a voltage between 1.62 V and 2.1 V on the BTL outputs when V_CC is not connected.

Products containing the "SN74FB2040" keyword are: SN74FB2040RC , SN74FB2040RC , SN74FB2040RCG3 , SN74FB2040RCG3 , SN74FB2040RCR , SN74FB2040RCR , SN74FB2040RCRG3 , SN74FB2040RCRG3

• Compatible With IEEE Std 1194.1-1991 (BTL)
• TTL A Port, Backplane Transceiver Logic (BTL) B\ Port
• Open-Collector B\-Port Outputs Sink 100 mA
• High-Impedance State During Power Up and Power Down
• BIAS V_CC Pin Minimizes Signal Distortion During Live Insertion or Withdrawal
• B\-Port Biasing Network Preconditions the Connector and PC Trace to the BTL High-Level Voltage