This 2-bit non-inverting bus transceiver uses two separate configurable power-supplyrails. The A ports are designed to track VCCA and accepts any supply voltagefrom 1.2 V to 3.6 V. The B ports are designed to track VCCB and accepts anysupply voltage from 1.2 V to 3.6 V. This allows for universal low-voltage bidirectional translationand level-shifting between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.
The SN74AVC2T45 is designed for asynchronous communication between two data buses. Thelogic levels of the direction-control (DIR pin) input activate either the B-port outputs or theA-port outputs. The device transmits data from the A bus to the B bus when the B-port outputs areactivated and from the B bus to the A bus when the A-port outputs are activated. The inputcircuitry on both A and B ports always is active and must have a logic HIGH or LOW level applied toprevent excess leakage current on the internal CMOS structure.
Products containing the "SN74AVC2T45" keyword are: SN74AVC2T45DCTR , SN74AVC2T45DCTR , SN74AVC2T45DCTRE4 , SN74AVC2T45DCTRE4 , SN74AVC2T45DCTRG4 , SN74AVC2T45DCTT , SN74AVC2T45DCTT , SN74AVC2T45DCTTE4 , SN74AVC2T45DCTTG4 , SN74AVC2T45DCUR , SN74AVC2T45DCUR , SN74AVC2T45DCUR , MN6570 , SN74AVC2T45DCURE4 , SN74AVC2T45DCURE4 , SN74AVC2T45DCURG4 , SN74AVC2T45DCURG4 , SN74AVC2T45DCUT , SN74AVC2T45DCUT , SN74AVC2T45DCUTG4 , SN74AVC2T45DCUTG4All trademarks are the property of their respective owners.
Status | ACTIVE |
SubFamily | Direction controlled voltage translation |
Technology Family | AVC |
Bits | 2 |
VCC | 3.6 |
Features | Partial power down (Ioff)^Over-voltage tolerant inputs |
Rating | Catalog |
Package Group | DSBGA|8 |
Package size: mm2:W x L (PKG) | See datasheet (DSBGA) |
ICCA static current | |
ICCB static current | |
Static Current | |
Schmitt Trigger |