LMK00306 - 3.1-GHz Differential Clock Buffer/Level Translator

The LMK00306 is a 3-GHz, 6-output differential fanout buffer intended for high-frequency, low-jitter clock/data distribution and level translation. The input clock can be selected from two universal inputs or one crystal input. The selected input clock is distributed to two banks of 3 differential outputs and one LVCMOS output. Both differential output banks can be independently configured as LVPECL, LVDS, or HCSL drivers, or disabled. The LVCMOS output has a synchronous enable input for runt-pulse-free operation when enabled or disabled. The LMK00306 operates from a 3.3 V core supply and 3 independent 3.3 V/2.5 V output supplies.

The LMK00306 provides high performance, versatility, and power efficiency, making it ideal for replacing fixed-output buffer devices while increasing timing margin in the system.

• 3:1 Input Multiplexer
  • Two Universal Inputs Operate up to 3.1 GHz
    and Accept LVPECL, LVDS, CML, SSTL,
    HSTL, HCSL, or Single-Ended Clocks
  • One Crystal Input Accepts a 10 to 40 MHz
    Crystal or Single-Ended Clock
• Two Banks with 3 Differential Outputs Each
  • LVPECL, LVDS, HCSL, or Hi-Z (Selectable
    Per Bank)
  • LVPECL Additive Jitter with LMK03806 Clock
    Source at 156.25 MHz:
    • 20 fs RMS (10 kHz to 1 MHz)
    • 51 fs RMS (12 kHz to 20 MHz)
• High PSRR: –65 / –76 dBc (LVPECL/LVDS) at
  156.25 MHz
• LVCMOS Output with Synchronous Enable Input
• Pin-Controlled Configuration
• V_CC Core Supply: 3.3 V ± 5%
• 3 Independent V_CCO Output Supplies: 3.3 V/2.5 V
  ± 5%
• Industrial Temperature Range: –40°C to +85°C
• 36-lead WQFN (6 mm × 6 mm)