CDC351 - 1-Line to 10-Line 3.3V Clock Driver with Tri-State Outputs

The CDC351 is a high-performance clock-driver circuit that distributes one input (A) to ten outputs (Y) with minimum skew for clock distribution. The output-enable (OE)\ input disables the outputs to a high-impedance state. The CDC351 operates at nominal 3.3-V V_CC.

The propagation delays are adjusted at the factory using the P0 and P1 pins. The factory adjustments ensure that the part-to-part skew is minimized and is kept within a specified window. Pins P0 and P1 are not intended for customer use and should be connected to GND.

Products containing the "CDC351" keyword are: CDC351 , CDC351BDR , CDC351DB , CDC351DB , CDC351DBG4 , CDC351DBG4 , CDC351DBLE , CDC351DBR , CDC351DBR , CDC351DBR CK351 , CDC351DBRG4 , CDC351DBRG4 , CDC351DGB4 , CDC351DW , CDC351DW , CDC351DWG4 , CDC351DWG4 , CDC351DWR , CDC351DWR , CDC351DWRG4

• Low Output Skew, Low Pulse Skew for Clock-Distribution and Clock-Generation Applications
• Operates at 3.3-V V_CC
• LVTTL-Compatible Inputs and Outputs
• Supports Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V V_CC)
• Distributes One Clock Input to Ten Outputs
• Distributed V_CC and Ground Pins Reduce Switching Noise
• High-Drive Outputs (-32-mA I_OH, 32-mA I_OL)
• State-of-the-Art EPIC-IIB^TM BiCMOS Design Significantly Reduces Power Dissipation
• Package Options Include Plastic Small-Outline (DW) and Shrink Small-Outline (DB) Packages

EPIC-IIB is a trademark of Texas Instruments Incorporated.