SN74ALVTHR16245 - 2.5-V/3.3-V 16-Bit Bus Transceiver With 3-State Outputs

The ’ALVTHR16245 devices are 16-bit (dual-octal) noninverting 3-state transceivers designed for 2.5-V or 3.3-V V_CC operation, but with the capability to provide a TTL interface to a 5-V system environment.

These devices can be used as two 8-bit transceivers or one 16-bit transceiver. They allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE)\ input can be used to disable the device so that the buses are effectively isolated.

All outputs are designed to sink up to 12 mA, and include equivalent 30- resistors to reduce overshoot and undershoot.

These devices are fully specified for hot-insertion applications using I_off and power-up 3-state. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

When V_CC is between 0 and 1.2 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.2 V, (OE)\ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Products containing the "SN74ALVTHR16245" keyword are: SN74ALVTHR16245DL , SN74ALVTHR16245DL , SN74ALVTHR16245GR , SN74ALVTHR16245GR , SN74ALVTHR16245GRE4 , SN74ALVTHR16245GRG4 , SN74ALVTHR16245KR , SN74ALVTHR16245KR , SN74ALVTHR16245LR , SN74ALVTHR16245LR , SN74ALVTHR16245VR , SN74ALVTHR16245VR , SN74ALVTHR16245VRG4

• State-of-the-Art Advanced BiCMOS Technology (ABT) Widebus™ Design for 2.5-V and 3.3-V Operation and Low Static-Power Dissipation
• Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 2.3-V to 3.6-V V_CC)
• Typical V_OLP (Output Ground Bounce) <0.8 V at V_CC = 3.3 V, T_A = 25°C
• High Drive (–12/12 mA at 3.3-V V_CC)
• I_off and Power-Up 3-State Support Hot Insertion
• Use Bus Hold on Data Inputs in Place of External Pullup/Pulldown Resistors to Prevent the Bus From Floating
• Output Ports Have Equivalent 30- Series Resistors, So No External Resistors Are Required
• Flow-Through Architecture Facilitates Printed Circuit Board Layout
• Distributed V_CC and GND Pins Minimize High-Speed Switching Noise
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Protection Exceeds JESD 22
  • 2000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)
  • 1000-V Charged-Device Model (C101)

Widebus is a trademark of Texas Instruments.