The ADS42LB49 and ADS42LB69 are a family of high-linearity, dual-channel, 14- and 16-bit,
250-MSPS, analog-to-digital converters (ADCs) supporting DDR and QDR LVDS output interfaces. The buffered analog input provides uniform input impedance across a wide frequency range while minimizing sample-and-hold glitch energy. A sampling clock divider allows more flexibility for system clock architecture design. The ADS42LBx9 provides excellent spurious-free dynamic range (SFDR) over a large input frequency range with low-power consumption.
| Status | ACTIVE |
| SubFamily | High-speed ADCs (>10MSPS) |
| Resolution | 16 |
| Sample Rate | 250 |
| Number of input channels | 2 |
| INL | |
| SNR | 75.8 |
| SFDR | 90 |
| Power consumption | 1640 |
| Interface | DDR LVDS^QDR LVDS |
| Architecture | Pipeline |
| Operating temperature range | -40 to 85 |
| Rating | Catalog |
| Package Group | VQFN|64 |
| Package size: mm2:W x L (PKG) | [pf]64VQFN[/pf]: 81 mm2: 9 x 9 (VQFN|64) |
| Approx. price | 185.00 | 1ku |
| Analog input BW | 900 |