ADS42LB49 - Dual-Channel, 14-Bit, 250-MSPS Analog-to-Digital Converter (ADC)

Updated : 2020-01-09 14:26:13
Description

The ADS42LB49 and ADS42LB69 are a family of high-linearity, dual-channel, 14- and 16-bit,
250-MSPS, analog-to-digital converters (ADCs) supporting DDR and QDR LVDS output interfaces. The buffered analog input provides uniform input impedance across a wide frequency range while minimizing sample-and-hold glitch energy. A sampling clock divider allows more flexibility for system clock architecture design. The ADS42LBx9 provides excellent spurious-free dynamic range (SFDR) over a large input frequency range with low-power consumption.

For all available packages, see the orderable addendum at the end of the datasheet.

Products containing the "ADS42LB49" keyword are: ADS42LB49EVM , ADS42LB49IRGC , ADS42LB49IRGC25 , ADS42LB49IRGC25 , ADS42LB49IRGCR , ADS42LB49IRGCR , ADS42LB49IRGCT
Features

  • Dual Channel
  • 14- and 16-Bit Resolution
  • Maximum Clock Rate: 250 MSPS
  • Analog Input Buffer with High Impedance Input
  • Flexible Input Clock Buffer with
    Divide-by-1, -2, and -4
  • 2-VPP and 2.5-VPP Differential Full-Scale Input (SPI-Programmable)
  • DDR or QDR LVDS Interface
  • 64-Pin VQFN Package (9-mm × 9-mm)
  • Power Dissipation: 820 mW/ch
  • Aperture Jitter: 85 fS
  • Internal Dither
  • Channel Isolation: 100 dB
  • Performance at fIN = 170 MHz at 2 VPP, –1 dBFS
    • SNR: 73.2 dBFS
    • SFDR:
      • 87 dBc (HD2 and HD3)
      • 100 dBc (Non HD2 and HD3)
  • Performance at fIN = 170 MHz:
    2.5 VPP, –1 dBFS
    • SNR: 74.9 dBFS
    • SFDR:
      • 85 dBc (HD2 and HD3)
      • 97 dBc (Non HD2 and HD3)