The ADS42JB69 and ADS42JB49 are high-linearity, dual-channel, 16- and 14-bit, 250-MSPS, analog-to-digital converters (ADCs). These devices support the JESD204B serial interface with data rates up to
3.125 Gbps. The buffered analog input provides uniform input impedance across a wide frequency range while minimizing sample-and-hold glitch energy making it easy to drive analog inputs up to very high input frequencies. A sampling clock divider allows more flexibility for system clock architecture design. The devices employ internal dither algorithms to provide excellent spurious-free dynamic range (SFDR) over a large input frequency range.
Status | ACTIVE |
SubFamily | High-speed ADCs (>10MSPS) |
Resolution | 14 |
Sample Rate | 250 |
Number of input channels | 2 |
INL | |
SNR | 75 |
SFDR | 95 |
Power consumption | 1700 |
Interface | JESD204B |
Architecture | Pipeline |
Operating temperature range | -40 to 85 |
Rating | Catalog |
Package Group | VQFN|64 |
Package size: mm2:W x L (PKG) | [pf]64VQFN[/pf]: 81 mm2: 9 x 9 (VQFN|64) |
Approx. price | 125.00 | 1ku |
Analog input BW | 900 |