The ADC12D1600QML is a low power, high performance CMOS analog-to-digital converter that digitizes signals at a 12-bit resolution at sampling rates up to 3.2 GSPS in an interleaved mode. It can also be used as a dual channel ADC for sampling rates up to 1.6 GSPS. For sampling rates below 800 MHz, there is a Low Sampling Power Saving Mode (LSPSM) that reduces power consumption to less than 1.4 W per channel (typical). The ADC can support conversion rates as low as 200 MSPS.
The ADC1600QML provides a flexible parallel LVDS interface which has multiple SPI programmable options to facilitate board design and ASIC/FPGA data capture. The LVDS outputs are compatible with IEEE 1596.3-1996 and support programmable common mode voltage. The output of each channel is configurable in either 1:1 non-demuxed or 1:2 demuxed modes. If used as a single channel ADC, there is an option for 1:4 demuxing of the output. The product comes in a hermetic 376 CPGA package for harsh environments.
Status | ACTIVE |
SubFamily | High-speed ADCs (>10MSPS) |
Resolution | 12 |
Sample Rate | 1600^3200 |
Number of input channels | 2^1 |
INL | |
SNR | 56.6 |
SFDR | 61.5 |
Power consumption | 3880 |
Interface | Parallel LVDS |
Architecture | Folding Interpolating |
Operating temperature range | -55 to 125 |
Rating | Space |
Package Group | CCGA|376 |
Package size: mm2:W x L (PKG) | [pf]376CCGA[/pf]: 781 mm2: 27.94 x 27.94 (CCGA|376) |
Approx. price | |
Analog input BW | 2400 |