The ADC12D1620QML device uses a package redesign to achieve better ENOB, SNR, and X-talkcompared to the ADC12D1600QML. As is its predecessor, the ADC12D1620QML is a low-power,high-performance CMOS analog-to-digital converter (ADC) that digitizes signals at a 12-bitresolution at sampling rates up to 3.2 GSPS in an interleaved mode. It can also be used as adual-channel ADC for sampling rates up to 1.6 GSPS. For sampling rates below 800 MHz, there is alow-sampling power-saving mode (LSPSM) that reduces power consumption to less than 1.4 W perchannel (typical). The ADC can support conversion rates as low as 200 MSPS.
All trademarks are the property of their respective owners.
Status | ACTIVE |
SubFamily | High-speed ADCs (>10MSPS) |
Resolution | 12 |
Sample Rate | 1600^3200 |
Number of input channels | 2^1 |
INL | |
SNR | 58.4 |
SFDR | 62.1 |
Power consumption | 3880 |
Interface | Parallel LVDS |
Architecture | Folding Interpolating |
Operating temperature range | -55 to 125 |
Rating | Space |
Package Group | CCGA|376 |
Package size: mm2:W x L (PKG) | [pf]376CCGA[/pf]: 781 mm2: 27.94 x 27.94 (CCGA|376) |
Approx. price | |
Analog input BW | 2400 |