DLPC230-Q1 - DLP® Automotive DMD Controller for DLP553x-Q1 Chipset

Updated : 2020-01-09 14:31:35
Description

The DLPC230-Q1 DMD Display Controller for automotive applications is part of two DMDchipsets: DLP5530-Q1 (interior display applications, such as HUD) and DLP5531-Q1 (exterior lightingapplications, such as high resolution headlight).  Both chipsets include a 0.55” DMD and theTPS99000-Q1 System Management and Illumination controller. The DLPC230-Q1 integrates an embeddedprocessor with error code correction (SECDED ECC), enablinghost control and real-time feedback, on-chip diagnostics, and system monitoring functions. On-chipSRAM is included to remove the need for external DRAM. Combined with the TPS99000-Q1, theDLPC230-Q1 supports high dynamic range dimming of over 5000:1 for HUD applications. Sub-LVDS600-MHz DMD interface allows high DMD refresh rates to generate seamless and brilliant digitalimages, while simultaneously reducing radiated emissions.

Features

  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 2: –40°C to 105°C Ambient Operating Temperature
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classification Level C4B
  • DMD Display Controller Supporting:
    • DLP5530-Q1 Automotive Interior Display Chipset
    • DLP5531-Q1 Automotive Exterior Lighting Chipset
  • Video Processing
    • Scales Input Image to Match DMD Resolution
    • Bezel Adjustment up ±50% Vertical Image Position and ±10% Horizontal Reducing the Need for Mechanical Alignment (HUD)
    • Support for Pixel Doubling or Quadrupling to Allow Low Resolution Video Input
    • Gamma Correction
  • Embedded Processor With Error Correction (ECC)
    • On-Chip Diagnostic and Self-Test Capability
    • System Diagnostics Including Temperature Monitoring, Device Interface Monitoring, and Photodiode Monitoring
    • Integrated Management of Smooth Dimming
    • Configurable GPIO
  • No External RAM Required, Internal SRAM for Image Processing
  • 600-MHz Sub-LVDS DMD Interface for Low Power and Emission
  • Spread Spectrum Clocking for Reduced EMI
  • Video Input Interface
    • Single OpenLDI (FPD-Link I) Port up
      to 110 MHz
    • 24-bit RGB Parallel Interface up to 110 MHz
  • Configurable Host Control Interface
    • Serial Peripheral Interface (SPI) 10 MHz
    • I2C (400 kHz)
    • Host IRQ Signal to Provide Real-Time Feedback for Critical System Errors
  • Interface to TPS99000-Q1 System Management and Illumination Controller

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Parametrics
StatusACTIVE
SubFamilyAutomotive chipsets
Display resolution1152 x 576
Chipset familyDLP5530-Q1^DLP5531-Q1
Component typeController
Input frame rate60
Video ports24-bit RGB or Open LDI
Array diagonal
Micromirror pitch
Operating temperature range-40 to 105
RatingAutomotive