This 18-bit universal bus driver is designed for 1.65-V to 3.6-V VCC operation.
Data flow from A to Y is controlled by the output-enable (OE)\ input. The device operates in the transparent mode when the latch-enable (LE)\ input is low. The A data is latched if the clock (CLK) input is held at a high or low logic level. If LE\ is high, the A data is stored in the latch/flip-flop on the low-to-high transition of CLK. When OE\ is high, the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Products containing the "SN74ALVC16834" keyword are: SN74ALVC16834DGGR , SN74ALVC16834DGVR , SN74ALVC16834DGVR , SN74ALVC16834DL , SN74ALVC16834DL , SN74ALVC16834DLG4 , SN74ALVC16834DLR , SN74ALVC16834ZQLR , SN74ALVC16834ZQLRWidebus is a trademark of Texas Instruments.
Status | ACTIVE |
SubFamily | Universal bus driver (UBD) |
Technology Family | ALVC |
Rating | Catalog |
Package Group | BGA MICROSTAR JUNIOR|56 |
Package size: mm2:W x L (PKG) | [pf]56BGA MICROSTAR JUNIOR[/pf]: 32 mm2: 4.5 x 7 (BGA MICROSTAR JUNIOR|56) |
Approx. price | 2.91 | 1ku |