Each of these Schottky-clamped data selectors/multiplexers contains inverters and drivers to supply fully complementary, on-chip, binary decoding data selection to the AND-OR gates. Separate output control inputs are provided for each of the two four-line sections.
The three-state outputs can interface with and drive data lines of bus-organized systems. With all but one of the common outputs disabled (at a high-impedance state) the low-impedance of the single enabled output will drive the bus line to a high or low logic level.
Products containing the "SN74LS253" keyword are: SN74LS253D , SN74LS253DE4 , SN74LS253DE4 , SN74LS253DG4 , SN74LS253DR , SN74LS253DR , SN74LS253DR2 , SN74LS253J , SN74LS253N , SN74LS253N , SN74LS253N. , SN74LS253ND , SN74LS253NS , SN74LS253NSR , SN74LS253NSR , SN74LS253NSRG4
| Status | ACTIVE |
| SubFamily | Encoders & decoders |
| Technology Family | LS |
| VCC | 5.25 |
| Bits | 4 |
| Voltage | 5 |
| F @ nom voltage | 35 |
| ICC @ nom voltage | 14 |
| tpd @ Nom Voltage | 25 |
| Rating | Catalog |
| Operating temperature range | 0 to 70 |
| Package Group | PDIP|16 |
| Package size: mm2:W x L (PKG) | See datasheet (PDIP) |
| Approx. price | 0.39 | 1ku |