CD74HC4024 - High Speed CMOS Logic 7-Stage Binary Ripple Counter

The ’HC4024 and ’HCT4024 are 7-stage ripple-carry binary counters. All counter stages are master-slave flip-flops. The state of the stage advances one count on the negative transition of each input pulse; a high voltage level on the MR line resets all counters to their zero state. All inputs and outputs are buffered.

Products containing the "CD74HC4024" keyword are: CD74HC4024E , CD74HC4024E , CD74HC4024EE4 , CD74HC4024EG4 , CD74HC4024M , CD74HC4024M , CD74HC4024M96 , CD74HC4024M96 , CD74HC4024M96E4 , CD74HC4024M96G4 , CD74HC4024ME4 , CD74HC4024MG4 , CD74HC4024MG4 , CD74HC4024MT , CD74HC4024MT , CD74HC4024MTE4 , CD74HC4024MTG4 , CD74HC4024PW , CD74HC4024PW , CD74HC4024PWE4

• Fully Static Operation
• Buffered Inputs
• Common Reset
• Negative Edge Clocking
• Fanout (Over Temperature Range)
  • Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
  • Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55°C to 125°C
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL Logic ICs
• HC Types
  • 2V to 6V Operation
  • High Noise Immunity: N_IL = 30%, N_IH = 30% of V_CC at V_CC = 5V
• HCT Types
  • 4.5V to 5.5V Operation
  • Direct LSTTL Input Logic Compatibility, V_IL = 0.8V (Max), V_IH = 2V (Min)
  • CMOS Input Compatibility, I_l 1µA at V_OL, V_OH