The CD40147B CMOS encoder features priority encoding of the inputs to ensure that only the highest-order data line is encoded. Ten data input lines (0-9) are encoded to four-line (8, 4, 2, 1) BCD. The highest priority line is line 9. All four output lines are logic 1 (VSS) when all input lines are logic 0. All inputs and outputs are buffered, and each output can drive one TTL low-power Schottky load. The CD40147B is functionally similar to the TTL54/74147 if pin 15 is tied low.
The CD40147B types are supplied in 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).
Products containing the "CD40147B" keyword are: CD40147BE , CD40147BE , CD40147BEE4 , CD40147BEE4 , CD40147BEG4 , CD40147BF3A , CD40147BM , CD40147BM , CD40147BM96 , CD40147BM96E4 , CD40147BM96G4 , CD40147BME4 , CD40147BMG4 , CD40147BMT , CD40147BMT , CD40147BMTE4 , CD40147BMTG4 , CD40147BNSR , CD40147BNSR , CD40147BNSRE4| Status | ACTIVE |
| SubFamily | Encoders & decoders |
| Technology Family | CD4000 |
| VCC | 18 |
| Bits | 10 |
| Voltage | 5^10^15 |
| F @ nom voltage | 8 |
| ICC @ nom voltage | 0.3 |
| tpd @ Nom Voltage | 400 |
| Rating | Catalog |
| Operating temperature range | -55 to 125 |
| Package Group | PDIP|16 |
| Package size: mm2:W x L (PKG) | See datasheet (PDIP) |
| Approx. price | 0.16 | 1ku |