The HC75 and HCT75 are dual 2-bit bistable transparent latches. Each one of the 2-bit latches is controlled by separate Enable inputs (1E\ and 2E\) which are active LOW. When the Enable input is HIGH data enters the latch and appears at the Q output. When the Enable input (1E\ and 2E\) is LOW the output is not affected.
Products containing the "CD74HC75" keyword are: CD74HC75E , CD74HC75E , CD74HC75EE4 , CD74HC75M , CD74HC75M , CD74HC75M96 , CD74HC75M96 , CD74HC75M96E4 , CD74HC75M96G4 , CD74HC75MG4 , CD74HC75MG4 , CD74HC75MT , CD74HC75MT , CD74HC75NSR , CD74HC75NSRE4 , CD74HC75NSRE4 , CD74HC75NSRG4 , CD74HC75NSRG4 , CD74HC75PW , CD74HC75PWData sheet acquired from Harris Semiconductor
Status | ACTIVE |
SubFamily | Other latch |
Technology Family | HC |
VCC | 6 |
Bits | 4 |
Voltage | 6 |
F @ nom voltage | 28 |
ICC @ nom voltage | 0.04 |
tpd @ Nom Voltage | 24 |
3-state output | No |
Rating | Catalog |
Operating temperature range | -55 to 125 |
Package Group | PDIP|16 |
Package size: mm2:W x L (PKG) | See datasheet (PDIP) |
Approx. price | 0.24 | 1ku |