CD40174B - CMOS Hex D-Type Flip-Flop

Cd40174B consists of six identical ’D’-type flip-flops having independent DATA inputs. The CLOCK and CLEAR\ inputs are common to all six units. Data are transferred to the Q outputs on the positive-going transition of the clock pulse. All sic flip-flops are simultaneously reset by a low level on the CLEAR\ input.

The CD40174B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

Products containing the "CD40174B" keyword are: CD40174BCM , CD40174BCN , CD40174BCN , CD40174BE , CD40174BE , CD40174BE(TSTDTS) , CD40174BE. , CD40174BE/CD40174BCN , CD40174BEE4 , CD40174BEE4 , CD40174BEG4 , CD40174BEX , CD40174BF , CD40174BF/3 , CD40174BF3 , CD40174BF3A , CD40174BF3A CD40174BF , CD40174BFMSR , CD40174BFX , CD40174BK

• 5-V, 10-V, and 15-V parametric ratings
• Standardized, symmetrical output characteristics
• 100% tested for quiescent current at 20 V
• Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
• Noise margin (full package-temperature range) =
          1 V at V_DD = 5 V
          2 V at V_DD = 10 V
       2.5 V at V_DD = 15 V
• Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"
• Applications:
  • Shift Registers
  • Buffer/Storage Registers
  • Pattern Generators