SN74LVC2G126-EP - Dual Bus Buffer Gate With 3-State Outputs

This dual bus buffer gate is designed for 1.65-V to 5.5-V V_CC operation.

The SN74LVC2G126 is a dual bus driver/line driver with 3-state outputs. The outputs are disabled when the associated output-enable (OE) input is low.

To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

• Supports 5-V V_CC Operation
• Inputs Accept Voltages to 5.5 V
• Max t_pd of 6.8 ns at 3.3 V
• Low Power Consumption, 10-μA Max I_CC
• ±24-mA Output Drive at 3.3 V
• Typical V_OLP (Output Ground Bounce)
  <0.8 V at V_CC = 3.3 V, T_A = 25°C
• Typical V_OHV (Output V_OH Undershoot)
  >2 V at V_CC = 3.3 V, T_A = 25°C
• I_off Supports Partial-Power-Down Mode Operation
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Protection Exceeds JESD 22
  • 2000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)
  • 1000-V Charged-Device Model (C101)

SUPPORTS DEFENSE, AEROSPACE, AND MEDICAL APPLICATIONS

• Controlled Baseline
• One Assembly and Test Site
• One Fabrication Site
• Available in Military (–55°C to 125°C) Temperature Range
• Extended Product Life Cycle
• Extended Product-Change Notification
• Product Traceability