These octal buffers/drivers with inverted outputs are designed for 2-V to 5.5-V VCC operation.
The LV240A devices are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.
These devices are organized as two 4-bit buffers/line drivers with separate output-enable (OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.
Products containing the "SN74LV240A" keyword are: SN74LV240ADBR , SN74LV240ADBR , SN74LV240ADBRE4 , SN74LV240ADBRE4 , SN74LV240ADBRG4 , SN74LV240ADBRG4 , SN74LV240ADGVR , SN74LV240ADGVR , SN74LV240ADGVRG4 , SN74LV240ADW , SN74LV240ADW , SN74LV240ADWR , SN74LV240ANSR , SN74LV240ANSR , SN74LV240APW , SN74LV240APW , SN74LV240APWG4 , SN74LV240APWG4 , SN74LV240APWR , SN74LV240APWRStatus | ACTIVE |
SubFamily | Inverting buffer/driver |
Technology Family | LV-A |
VCC | 5.5 |
Bits | 8 |
Voltage | 3.3^5 |
F @ nom voltage | 110 |
tpd @ Nom Voltage | 14^9 |
ICC @ nom voltage | 0.02 |
IOL | 50 |
IOH | -50 |
Rating | Catalog |
Operating temperature range | -40 to 125 |
Package Group | SOIC|20 |
Package size: mm2:W x L (PKG) | [pf]20SO[/pf]: 98 mm2: 7.8 x 12.6 (SO|20) |
Approx. price | 0.19 | 1ku |