SN74LV126A - Quadruple Bus Buffer Gates With 3-State Outputs

The ’LV126A quadruple bus buffer gates are designed for 2-V to 5.5-V V_CC operation.

These quadruple bus buffer gates are designed for 2-V to 5.5-V V_CC operation.

The ’LV126A devices feature independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low.

To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

• 2-V to 5.5-V V_CC Operation
• Max t_pd of 6.5 ns at 5 V
• Typical V_OLP (Output Ground Bounce) <0.8 V at
  V_CC = 3.3 V, T_A = 25°C
• Typical V_OHV (Output V_OH Undershoot) >2.3 V at
  V_CC = 3.3 V, T_A = 25°C
• Ioff Supports Live Insertion, Partial Power Down
  Mode, and Back Drive Protection
• Support Mixed-Mode Voltage Operation on All
  Ports
• Latch-Up Performance Exceeds 250 mA per JESD 17
• ESD Protection Exceeds JESD 22
  • 2000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)
  • 1000-V Charged-Device Model (C101)