The SNx4LS24x, SNx4S24x octal buffers and line drivers are designed specifically to improve both the performance and density of three-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The designer has a choice of selected combinations of inverting and non-inverting outputs, symmetrical, active-low output-control (G) inputs, and complementary output-control (G and G) inputs. These devices feature high fan-out, improved fan-in, and 400-mV noise margin. The SN74LS24x and SN74S24x devices can be used to drive terminated lines down to 133 Ω.
Products containing the "SN74LS244" keyword are: SN74LS244DBR , SN74LS244DBR , SN74LS244DBRG4 , SN74LS244DBRG4 , SN74LS244DW , SN74LS244DW , SN74LS244DWE4 , SN74LS244DWG4 , SN74LS244DWR , SN74LS244DWR , SN74LS244DWR. , SN74LS244DWR2 , SN74LS244DWRE4 , SN74LS244DWRE4 , SN74LS244DWRG , SN74LS244DWRG4 , SN74LS244J , SN74LS244MEL , SN74LS244ML1 , SN74LS244MR1| Status | ACTIVE |
| SubFamily | Non-Inverting buffer/driver |
| Technology Family | LS |
| VCC | 5.25 |
| Bits | 8 |
| Voltage | 5 |
| F @ nom voltage | 35 |
| tpd @ Nom Voltage | 18 |
| ICC @ nom voltage | 0.046 |
| IOL | 24 |
| IOH | -15 |
| Rating | Catalog |
| Operating temperature range | 0 to 70 |
| Package Group | PDIP|20 |
| Package size: mm2:W x L (PKG) | See datasheet (PDIP) |
| Approx. price | 0.31 | 1ku |