These bus buffers feature three-state outputs that, when enabled, have the low impedance characteristics of a TTL output with additional drive capability at high logic levels to permit driving heavily loaded bus lines without external pullup resistors. When disabled, both output transistors are turned off, presenting a high-impedance state to the bus so the output will act neither as a significant load nor as a driver. The 125 and LS125A devices outputs are disabled when G\ is high. The 126 and LS126A devices outputs are disabled when G is low.
Products containing the "SN74LS125A" keyword are: SN74LS125AD , SN74LS125AD , SN74LS125ADBR , SN74LS125ADBR , SN74LS125ADBRG4 , SN74LS125ADE4 , SN74LS125ADE4 , SN74LS125ADR , SN74LS125ADR , SN74LS125ADR2 , SN74LS125ADRE4 , SN74LS125ADRE4 , SN74LS125ADRG4 , SN74LS125AM , SN74LS125AMEJ , SN74LS125AMEL , SN74LS125AML1 , SN74LS125AMR1 , SN74LS125AMR2 , SN74LS125ANThe SN54125, SN54126, SN74125, SN74126, and SN54LS126A are obsolete and are no longer supplied.
| Status | ACTIVE |
| SubFamily | Non-Inverting buffer/driver |
| Technology Family | LS |
| VCC | 5.25 |
| Bits | 4 |
| Voltage | 5 |
| F @ nom voltage | 35 |
| tpd @ Nom Voltage | 18 |
| ICC @ nom voltage | 0.062 |
| IOL | 24 |
| IOH | -2.6 |
| Rating | Catalog |
| Operating temperature range | 0 to 70 |
| Package Group | PDIP|14 |
| Package size: mm2:W x L (PKG) | See datasheet (PDIP) |
| Approx. price | 0.23 | 1ku |