SN74AUP1G125 - Low-Power Single Bus Buffer Gate with 3-State Output

The SN74AUP1G125 bus buffer gate is a single line driver with a 3-stateoutput. The output is disabled when the output-enable (OE) input is high.This device has the input-disable feature, which allows floating input signals.

To ensure the high-impedance state during power up or power down,OE must be tied to V_CC through a pullup resistor; theminimum value of the resistor is determined by the current-sinking capability of the driver.

• Available in the Texas Instruments NanoStar™ Package
• Low Static-Power Consumption
  (I_CC = 0.9 µA Maximum)
• Low Dynamic-Power Consumption
  (C_pd = 4 pF Typical at 3.3 V)
• Low Input Capacitance (C_I = 1.5 pF Typical)
• Low Noise – Overshoot and Undershoot
  < 10% of V_CC
• Input-Disable Feature Allows Floating Input Conditions
• I_off Supports Partial-Power-Down Mode Operation
• Input Hysteresis Allows Slow Input Transition and Better Switching Noise Immunity at Input
• Wide Operating V_CC Range of 0.8 V to 3.6 V
• 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
• t_pd = 4.6 ns Maximum at 3.3 V

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