The SN54LVC02A quadruple 2-input positive-NOR gate is designed for 2.7-V to 3.6-V VCC operation, and the SN74LVC02A quadruple 2-input positive-NOR gate is designed for 1.65-V to 3.6-V VCC operation.
The 'LVC02A devices perform the Boolean function Y = A + B or Y = AB in positive logic.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.
Products containing the "SN74LVC02A" keyword are: SN74LVC02AD , SN74LVC02AD , SN74LVC02ADBR , SN74LVC02ADBR , SN74LVC02ADBR LC02A , SN74LVC02ADBRG4 , SN74LVC02ADG4 , SN74LVC02ADG4 , SN74LVC02ADR , SN74LVC02ADR , SN74LVC02ADR SOP3.9 , SN74LVC02ADRG4 , SN74LVC02ADRG4 , SN74LVC02ADT , SN74LVC02ADT , SN74LVC02AMPWREP , SN74LVC02AMPWREP , SN74LVC02ANSR , SN74LVC02ANSR , SN74LVC02ANSRE4Status | ACTIVE |
SubFamily | NOR gate |
Technology Family | LVC |
VCC | 3.6 |
Channels | 4 |
Inputs per channel | 2 |
ICC @ nom voltage | 0.04 |
IOL | 24 |
IOH | -24 |
Input type | Standard CMOS |
Output type | Push-Pull |
Features | Partial Power Down (Ioff)^Over-Voltage Tolerant Inputs^Ultra High Speed (tpd <5ns) |
Data rate | 100 |
Rating | Catalog |
Operating temperature range | -40 to 125 |
Package Group | SOIC|14 |
Package size: mm2:W x L (PKG) | [pf]14SO[/pf]: 80 mm2: 7.8 x 10.2 (SO|14) |
Approx. price | 0.08 | 1ku |