The SN74LVC00A quadruple 2-input positive-NAND gate is designed for 2.7-V to 3.6-V VCC operation.
The device performs the Boolean function Y = A B or Y = A + B in positive logic.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment.
(1) Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.
Status | ACTIVE |
SubFamily | NAND gate |
Technology Family | LVC |
VCC | 3.6 |
Channels | 4 |
Inputs per channel | 2 |
ICC @ nom voltage | 0.04 |
IOL | 24 |
IOH | -24 |
Input type | Standard CMOS |
Output type | Push-Pull |
Features | Partial Power Down (Ioff)^Over-Voltage Tolerant Inputs^Ultra High Speed (tpd <5ns) |
Data rate | 100 |
Rating | HiRel Enhanced Product |
Operating temperature range | -40 to 125 |
Package Group | SOIC|14 |
Package size: mm2:W x L (PKG) | [pf]14SOIC[/pf]: 52 mm2: 6 x 8.65 (SOIC|14) |
Approx. price | 0.25 | 1ku |