Memory interface clocks & registers

SN74SSQEC32882 - JEDEC SSTE32882 Compliant Low Power 28-Bit to 56-Bit Registered Buffer with Address-Parity Test
SN74SSTV32852 - 24-Bit to 48-Bit Registered Buffer with SSTL_2 Inputs and Outputs
SN74SSTV16859 - 13-Bit to 26-Bit Registered Buffer with SSTL_2 Inputs and Outputs
SN74SSTVF16857 - 14-Bit Registered Buffer With SSTL_2 Inputs and Outputs
SN74SSTVF32852 - 24-Bit to 48-Bit Registered Buffer with SSTL_2 Inputs and Outputs
SN74SSTVF16859 - 13-Bit to 26-Bit Registered Buffer with SSTL_2 Inputs and Outputs
SN74SSTU32864C - 25-Bit Configurable Registered Buffer with SSTL_18 Inputs and Outputs
SN74SSTU32864 - 25-Bit Configurable Registered Buffer with SSTL_18 Inputs and Outputs
SN74SSTUB32866 - 25-Bit Configurable Registered Buffer With Address-Parity Test
SN74SSTUB32864 - 25-Bit Configurable Registered Buffer with SSTL_18 Inputs and Outputs
74SSTUB32866A - 25-Bit Configurable Registered Buffer w/Address-Parity Test
74SSTUB32864A - 25-Bit Configurable Registered Buffer with SSTL_18 Inputs and Outputs
CDCD5704 - Rambus XDR Clock Generator
74SSTUB32868 - 28-Bit to 56-Bit Registered Buffer with Address-Parity Test
74SSTUB32868A - 28-Bit to 56-Bit Registered Buffer with Address-Parity Test
SN74SSTEB32866 - 1.5V/1.8V 25-Bit Configurable Registered Buffer With Address-Parity Test
SN74SSQEA32882 - JEDEC SSTE32882 Compliant 28-Bit to 56-Bit Registered Buffer with Address-Parity Test
SN74SSQEB32882 - JEDEC SSTE32882 Compliant 28-Bit to 56-Bit Registered Buffer with Address-Parity Test
CDCR61A - Direct RAMBus Clock Generator - Lite

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