The CDCLVC1310 is a highly versatile, low-jitter, low-power clock fanout buffer which can distribute to ten low-jitter LVCMOS clock outputs from one of three inputs, whose primary and secondary inputs can feature differential or single-ended signals and crystal input. Such a buffer is good for use in a variety of mobile and wired infrastructure, data communication, computing, low-power medical imaging, and portable test and measurement applications. When the input is an illegal level, the output is at a defined state. One can set the core to 2.5 V or 3.3 V, and output to 1.5 V, 1.8 V, 2.5 V or 3.3 V. Pin programming easily configures the CDCLVC1310. The overall additive jitter performance is 25 fsRMS (typical). The CDCLVC1310 comes in a small 32-pin 5-mm × 5-mm QFN package.
Products containing the "CDCLVC1310" keyword are: CDCLVC1310 , CDCLVC1310-EVM , CDCLVC1310RHBR , CDCLVC1310RHBRStatus | ACTIVE |
SubFamily | Single-ended |
Additive RMS jitter | 25 |
Output frequency | 200 |
Input level | HCSL^LVCMOS^LVDS^LVPECL^SSTL^XTAL |
Number of outputs | 10 |
Output level | LVCMOS |
VCC | 2.5^3.3 |
VCC out | 1.5^1.8^2.5^2.8 |
Input frequency | 200 |
Operating temperature range | -40 to 85 |
Package Group | VQFN|32 |
Package size: mm2:W x L (PKG) | [pf]32VQFN[/pf]: 25 mm2: 5 x 5 (VQFN|32) |
Rating | Catalog |
Approx. price | 2.95 | 1ku |