This octal bus transceiver is designed for asynchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements.
The SN74LV245AT allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
Products containing the "SN74LV245AT" keyword are: SN74LV245ATDBR , SN74LV245ATDBR , SN74LV245ATDBRG4 , SN74LV245ATDGVR , SN74LV245ATDGVR , SN74LV245ATDGVRG4 , SN74LV245ATDW , SN74LV245ATDW , SN74LV245ATDWR , SN74LV245ATDWR , SN74LV245ATNS , SN74LV245ATNSE4 , SN74LV245ATNSE4 , SN74LV245ATNSG4 , SN74LV245ATNSG4 , SN74LV245ATNSR , SN74LV245ATNSR , SN74LV245ATPW , SN74LV245ATPW , SN74LV245ATPWRStatus | ACTIVE |
SubFamily | Standard transceiver |
Technology Family | LV-AT |
VCC | 5.5 |
Bits | 8 |
Voltage | 5 |
F @ nom voltage | 110 |
tpd @ Nom Voltage | 9.5 |
IOL | 16 |
Rating | Catalog |
Operating temperature range | -40 to 125 |
Package Group | SOIC|20 |
Package size: mm2:W x L (PKG) | [pf]20SO[/pf]: 98 mm2: 7.8 x 12.6 (SO|20) |
Approx. price | 0.11 | 1ku |
Schmitt Trigger | No |