SN74ALVCH16543 - 16-Bit Registered Transceiver With 3-State Outputs

This 16-bit registered transceiver is designed for 1.65-V to 3.6-V V_CC operation.

The SN74ALVCH16543 can be used as two 8-bit transceivers or one 16-bit transceiver. Separate latch-enable (LEAB\ or LEBA\) and output-enable (OEAB\ or OEBA\) inputs are provided for each register to permit independent control in either direction of data flow.

The A-to-B enable (CEAB)\ input must be low to enter data from A or to output data from B. If CEAB is low and LEAB\ is low, the A-to-B latches are transparent; a subsequent low-to-high transition of LEAB\ puts the A latches in the storage mode. With CEAB\ and OEAB\ both low, the 3-state B outputs are active and reflect the data present at the output of the A latches. Data flow from B to A is similar, but requires using CEBA\, LEBA\, and OEBA\.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

The SN74ALVCH16543 is characterized for operation from –40°C to 85°C.

Products containing the "SN74ALVCH16543" keyword are: SN74ALVCH16543DGG , SN74ALVCH16543DGGE4 , SN74ALVCH16543DGGR , SN74ALVCH16543DGGRG4 , SN74ALVCH16543DL , SN74ALVCH16543DL , SN74ALVCH16543DLR , SN74ALVCH16543DLR

• Member of the Texas Instruments Widebus™ Family
• EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process
• Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
• ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
• Latch-Up Performance Exceeds 250 mA Per JESD 17
• Package Options Include Plastic 300-mil Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages

Widebus, EPIC are trademarks of Texas Instruments.