DAC8555 - 16-Bit, Quad Channel, Ultralow Glitch, Voltage Output Digital to Analog Converter

The DAC8555 is a 16-bit, quad channel, voltage output digital-to-analog converter (DAC) offering low-power operation and a flexible serial host interface. It offers monotonicity, good linearity, and exceptionally low glitch. Each on-chip precision output amplifier allows rail-to-rail output swing to be achieved over the supply range of 2.7V to 5.5V. The device supports a standard 3-wire serial interface capable of operating with input data clock frequencies up to 50MHz for IOV_DD = 5V.

The DAC8555 requires an external reference voltage to set the output range of each DAC channel. Also incorporated into the device is a power-on reset circuit, which can be programmed to ensure that the DAC outputs power up at zero-scale or midscale and remain there until a valid write takes place. The device also has the capability to function in both binary and 2's complement mode. The DAC8555 provides a per channel power-down feature, accessed over the serial interface, that reduces the current consumption to 175nA per channel at 5V.

The low-power consumption of this device in normal operation makes it ideally suited to portable battery- operated equipment and other low-power applications. The power consumption is 5mW at 5V, reducing to 4µW in power-down mode.

The DAC8555 is available in a TSSOP-16 package with a specified operating temperature range of -40°C to +105°C.

Products containing the "DAC8555" keyword are: DAC8555EVM , DAC8555IPW , DAC8555IPW , DAC8555IPWG4 , DAC8555IPWR , DAC8555IPWRG4

• Relative Accuracy: 4LSB
• Glitch Energy: 0.15nV-s
• MicroPower Operation: 150µA per Channel at 2.7V
• Power-On Reset to Zero-Scale or Midscale
• Power Supply: +2.7V to +5.5V
• 16-Bit Monotonic OverTemperature
• Settling Time: 10µs to ±0.003% FSR
• Ultra-Low AC Crosstalk: -100dB Typ
• Low-Power SPI-Compatible Serial Interface with Schmitt-Triggered Inputs: Up to 50MHz
• On-Chip Output Buffer Amplifier with Rail-to-Rail Operation
• Double Buffered Input Architecture
• Simultaneous or Sequential Output Update and Power-Down
• Binary and 2's Complement Capability
• Asynchronous Clear to Zero-Scale and Midscale
• 1.8V to 5.5V Logic Compatibility
• Available in a TSSOP-16 Package
• APPLICATIONS
  • Portable Instrumentation
  • Closed-Loop Servo-Control
  • Process Control
  • Data Acquisition Systems
  • Programmable Attenuation
  • PC Peripherals

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