DAC38RF84 - 14-Bit, 9-GSPS, 6x-24x Interpolating, 6 & 9 GHz PLL Digital-to-Analog Converter (DAC)

The DAC38RFxx isa family of high-performance, dual/single-channel, 14-bit, 9-GSPS,RF-sampling digital-to-analog converters (DACs) that are capable of synthesizing wideband signalsfrom 0 to 4.5 GHz. A high dynamic range allows the DAC38RFxxfamily to generate signals for a wide range of applications including 3G/4G signals for wirelessbase-stations and radar.

The devices feature a low-power JESD204B Interface with up to 8 lanes with a maximum bitrate of 12.5 Gbps allowing an input data rate of 1.25 GSPS complex per channel. The DAC38RFxxprovides two digital up-converters per channel, with multiple options for interpolation rates. Adigital quadrature modulator with independent, frequency flexible NCOs are available to supportmulti-band operation. An optional low-jitter PLL/VCO simplifies the DACsampling clock generation by allowing use of a lower frequency reference clock.

• 14-Bit Resolution
• Maximum DAC Sample Rate: 9 GSPS
• Key Specifications:
  • RF Full-Scale Output Power at 2.1 GHz:
    • DAC38RF80/90/84: 0 dBm
    • DAC38RF83/93/85: 3 dBm (with 2:1 balun)
  • Spectral Performance(on-chip PLL, DIFF):
    • f_DAC = 5898.24 MSPS, f_OUT = 2.14 GHz
      • WCDMA ACLR: 75 dBc
      • WCDMA alt-ACLR: 77 dBc
    • f_DAC = 8847.36 MSPS, f_OUT = 3.7 GHz
      • 20 MHz LTE ACLR: 63 dBc
    • f_DAC = 9 GSPS, f_OUT = 1.8 GHz
      • IMD3 = 70 dBc (–6 dBFS, 10-MHz tone spacing)
      • NSD = –157 dBc/Hz
• Dual-Band Digital Up-converter per DAC
  • 6, 8, 10, 12, 16, 18, 20 or 24x Interpolation
  • 4 Independent NCOs With 48-Bit Resolution
• JESD204B Interface, Subclass 1
  • Support for Multichip Synchronization
  • Maximum Lane Rate: 12.5 Gbps
• Single-Ended Output With Integrated Balun (DAC38RF80/90/84) Covering 700 MHz to 3800 MHz
• Internal PLL and VCO With Bypass
  • f_C(VCO) = 5.9 or 8.9 GHz
• Power Dissipation: 1.4 to 2.2 W/ch
• Power Supplies: –1.8 V, 1 V, 1.8 V
• Package: 10 x 10 mm BGA, 0.8 mm Pitch, 144-Balls

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