The DAC3174 is a dual-channel, 14-bit, 500-MSPS, digital-to-analog converter (DAC). The DAC3174 uses a 14-bit, low-voltage differential signaling (LVDS) digital bus, with one or two independent dual-data rate (DDR) data clocks for flexibility in providing data from different sources in each channel.
An input first-in first out block (FIFO) allows independent data and sample clocks. FIFO input and output pointers can be synchronized across multiple devices for precise signal synchronization.
The DAC outputs are current sourcing and terminate to GND with a compliance range of –0.5 V to +1 V.
The DAC3174 is pin compatible with the dual-channel, 500-MSPS, 12-bit DAC3164 and 10-bit DAC3154, and the single-channel, 500-MSPS, 14-bit DAC3171, 12-bit DAC3161, and 10-bit DAC3151.
The device is available in a 64-pin VQFN PowerPAD™ package. and is specified over the full industrial temperature range of –40°C to +85°C.
Products containing the "DAC3174" keyword are: DAC3174EVM , DAC3174EVM , DAC3174IRGC25 , DAC3174IRGCR , DAC3174IRGCT , DAC3174IRGCTStatus | ACTIVE |
SubFamily | High-speed DACs (>10MSPS) |
Resolution | 14 |
Settling Time | 0.011 |
Sample / Update Rate | 500 |
DAC channels | 2 |
Architecture | Current Source |
Power consumption | 464 |
Interface | DDR LVDS |
INL | |
Reference: type | Ext^Int |
Output type | |
Rating | Catalog |
Operating temperature range | -40 to 85 |
Package Group | VQFN|64 |
Package size: mm2:W x L (PKG) | [pf]64VQFN[/pf]: 81 mm2: 9 x 9 (VQFN|64) |
Approx. price | 18.90 | 1ku |
SFDR | 82 |