ADS6125/ADS6124/ADS6123/ADS6122 (ADS612X) is a family of 12-bit A/D converters with sampling frequencies up to 125 MSPS. It combines high performance and low power consumption in a compact 32 QFN package. Using an internal high bandwidth sample and hold and a low jitter clock buffer helps to achieve high SNR and high SFDR even at high input frequencies.
It features coarse and fine gain options that are used to improve SFDR performance at lower full-scale analog input ranges.
The digital data outputs are either parallel CMOS or DDR LVDS (Double Data Rate). Several features exist to ease data capture such as controls for output clock position and output buffer drive strength, and LVDS current and internal termination programmability.
The output interface type, gain, and other functions are programmed using a 3-wire serial interface. Alternatively, some of these functions are configured using dedicated parallel pins so that the device comes up in the desired state after power-up.
ADS612X includes internal references, while eliminating the traditional reference pins and associated external decoupling. External reference mode is also supported.
The devices are specified over the industrial temperature range (-40°C to 85°C).
Products containing the "ADS6125" keyword are: ADS6125EVM , ADS6125IRHB25 , ADS6125IRHB25 , ADS6125IRHBR , ADS6125IRHBR , ADS6125IRHBRG4 , ADS6125IRHBT , ADS6125IRHBT , ADS6125IRHBTG4 , ADS6125IRHBTG4Status | ACTIVE |
SubFamily | High-speed ADCs (>10MSPS) |
Resolution | 12 |
Sample Rate | 125 |
Number of input channels | 1 |
INL | |
SNR | 71.3 |
SFDR | 80 |
Power consumption | 417 |
Interface | DDR LVDS^Parallel CMOS |
Architecture | Pipeline |
Operating temperature range | -40 to 85 |
Rating | Catalog |
Package Group | VQFN|32 |
Package size: mm2:W x L (PKG) | [pf]32VQFN[/pf]: 25 mm2: 5 x 5 (VQFN|32) |
Approx. price | 27.01 | 1ku |
Analog input BW | 500 |