ADS4229 - Dual-Channel, 12-Bit, 250-MSPS Analog-to-Digital Converter (ADC)

Updated : 2020-01-09 14:27:38
Description

The ADS4229 is a member of the ADS42xx ultralow-power family of dual-channel, 12-bit and 14-bit analog-to-digital converters (ADCs). Innovative design techniques are used to achieve high dynamic performance, while consuming extremely low power with a 1.8-V supply. This topology makes the ADS4229 well-suited for multi-carrier, wide-bandwidth communications applications.

The ADS4229 has gain options that can be used to improve spurious-free dynamic range (SFDR) performance at lower full-scale input ranges. This device also includes a dc offset correction loop that can be used to cancel the ADC offset. Both double data rate (DDR) low-voltage differential signaling (LVDS) and parallel complementary metal oxide semiconductor (CMOS) digital output interfaces are available in a compact QFN-64 PowerPAD™ package.

The device includes internal references while the traditional reference pins and associated decoupling capacitors have been eliminated. The ADS4229 is specified over the industrial temperature range (–40°C to +85°C).

Products containing the "ADS4229" keyword are: ADS4229EVM , ADS4229IRGC , ADS4229IRGC25 , ADS4229IRGC25 , ADS4229IRGCR , ADS4229IRGCR , ADS4229IRGCT , ADS4229IRGCT
Features

  • Maximum Sample Rate: 250 MSPS
  • Ultralow Power with Single 1.8-V Supply:
    • 545-mW Total Power at 250 MSPS
  • High Dynamic Performance:
    • 80.8-dBc SFDR at 170 MHz
    • 69.4-dBFS SNR at 170 MHz
  • Crosstalk: > 90 dB at 185 MHz
  • Programmable Gain Up to 6 dB for
    SNR and SFDR Trade-off
  • DC Offset Correction
  • Output Interface Options:
    • 1.8-V Parallel CMOS Interface
    • DDR LVDS With Programmable Swing:
      • Standard Swing: 350 mV
      • Low Swing: 200 mV
  • Supports Low Input Clock Amplitude
    Down to 200 mVPP
  • Package: 9-mm × 9-mm, 64-Pin Quad Flat
    No-Lead (QFN) Package