The ADC12DS080 is a high-performance CMOS analog-to-digital converter capable of converting two analog input signals into 12-bit digital words at rates up to 80 Mega Samples Per Second (MSPS). The digital outputs are serialized and provided on differential LVDS signal pairs. This converter uses a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption and the external component count, while providing excellent dynamic performance. The ADC12DS080 may be operated from a single +3.0V or 3.3V power supply. A power-down feature reduces the power consumption to very low levels while still allowing fast wake-up time to full operation. The differential inputs accept a 2V full scale differential input swing. A stable 1.2V internal voltage reference is provided, or the ADC12DS080 can be operated with an external 1.2V reference. The selectable duty cycle stabilizer maintains performance over a wide range of clock duty cycles. A serial interface allows access to the internal registers for full control of the ADC12DS080's functionality. The ADC12DS080 is available in a 60-lead WQFN package and operates over the industrial temperature range of −40°C to +85°C
Products containing the "ADC12DS080" keyword are: ADC12DS080CISQ , ADC12DS080CISQ/NOPB , ADC12DS080CISQE/NOPB , ADC12DS080CISQE/NOPBAll trademarks are the property of their respective owners.
| Status | ACTIVE |
| SubFamily | High-speed ADCs (>10MSPS) |
| Resolution | 12 |
| Sample Rate | 80 |
| Number of input channels | 2 |
| INL | |
| SNR | 70 |
| SFDR | 81 |
| Power consumption | 800 |
| Interface | Serial LVDS |
| Architecture | Pipeline |
| Operating temperature range | -40 to 85 |
| Rating | Catalog |
| Package Group | WQFN|60 |
| Package size: mm2:W x L (PKG) | [pf]60WQFN[/pf]: 81 mm2: 9 x 9 (WQFN|60) |
| Approx. price | 27.84 | 1ku |
| Analog input BW | 1000 |