The ADC128S102 device is a low-power, eight-channel CMOS 12-bit analog-to-digitalconverter specified for conversion throughput rates of 50 kSPS to 1 MSPS. The converter is based ona successive-approximation register architecture with an internal track-and-hold circuit. Thedevice can be configured to accept up to eight input signals at inputs IN0 through IN7.
The output serial data is straight binary and is compatible with several standards, suchas SPI, QSPI, MICROWIRE, and many common DSP serial interfaces.
The ADC128S102 may be operated with independent analog and digital supplies. The analogsupply (VA) can range from 2.7 V to 5.25 V, and the digital supply(VD) can range from 2.7 V to VA. Normal powerconsumption using a 3-V or 5-V supply is 2.3 mW and 10.7 mW, respectively. The power-down featurereduces the power consumption to 0.06 µW using a 3-V supply and 0.25 µW using a 5-V supply.
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Status | ACTIVE |
SubFamily | Precision ADCs (<=10MSPS) |
Resolution | 12 |
Sample Rate | 1 |
Number of input channels | 8 |
INL | 1.1 |
SNR | 72 |
SFDR | 91 |
Power consumption | 2.3 |
Interface | Microwire (Serial I/O)^QSPI^SPI |
Architecture | SAR |
Operating temperature range | -55 to 125 |
Rating | Space |
Package Group | CFP|16 |
Package size: mm2:W x L (PKG) | See datasheet (CFP) |
Approx. price | |
Analog input BW |