The LMK02000 precision clock conditioner combines the functions of jittercleaning/reconditioning, multiplication, and distribution of a reference clock. The deviceintegrates a high performance Integer-N Phase Locked Loop (PLL), three LVDS, and five LVPECL clockoutput distribution blocks.
Each clock distribution block includes a programmable divider, a phase synchronizationcircuit, a programmable delay, a clock output mux, and an LVDS or LVPECL output buffer. This allowsmultiple integer-related and phase-adjusted copies of the reference to be distributed to eightsystem components.
The clock conditioner comes in a 48-pin WQFN package and is footprint compatible withother clocking devices in the same family.
Products containing the "LMK02000" keyword are: LMK02000EVAL-1 , LMK02000EVAL-1 , LMK02000EVAL-2 , LMK02000EVAL2 , LMK02000ISQ , LMK02000ISQ+ , LMK02000ISQ/NOPB , LMK02000ISQ/NOPB , LMK02000ISQNOPB , LMK02000ISQX , LMK02000ISQX/NOPB , LMK02000ISQX/NOPB , LMK02000ISQXNOPBAll trademarks are the property of their respective owners.
Status | ACTIVE |
SubFamily | General purpose |
Number of outputs | 8 |
Output frequency | 800 |
Output level | LVDS |
Programmability | uWire |
VCC core | 3.3 |
VCC out | 3.3 |
Operating temperature range | -40 to 85 |
Package size: mm2:W x L (PKG) | [pf]48WQFN[/pf]: 49 mm2: 7 x 7 (WQFN|48) |
Approx. price | 9.75 | 1ku |
Input level | LVCMOS^LVPECL |
Features | |
Package Group | WQFN|48 |
Rating | Catalog |