The CDCI6214device is an ultra-low power clock generator. The device selects between two independent referenceinputs to a phase-locked loop and generates up to four different frequencies on configurabledifferential output channels and also a copy of the reference clock on a LVCMOS outputchannel.
Each of the four output channels has a configurable integer / fractional outputdivider and a dedicated integer divider. Together with the output muxes, this allows up tofive different frequencies. Clock distribution dividers are reset in a deterministic way for cleanclock gating and glitch-less update capability. Flexible power-down options allow to optimize thedevice for lowest power consumption in active and standby operation. Typically four 156.25 MHz LVDSoutputs consume 150 mW at 1.8V. Typical RMS jitter of 386 fs for 100 MHz HCSL output enhancessystem margin for PCIe applications.
The CDCI6214 isconfigured using internal registers that are accessed by anI2C-compatible serial interface and internal EEPROM.
The CDCI6214enables high-performance clock trees from a single reference at ultra-low power with a smallfootprint. The factory- and user-programmable EEPROM make the CDCI6214 ideal as easy-to-use, instant-on clocking solution with low powerconsumption.
Products containing the "CDCI6214" keyword are: CDCI6214EVM , CDCI6214EVM , CDCI6214RGER , CDCI6214RGER , CDCI6214RGET , CDCI6214RGETAll trademarks are the property of their respective owners.
Status | ACTIVE |
SubFamily | Low jitter <1psec RMS |
Number of outputs | 4 |
Output frequency | 350 |
Output level | LVCMOS^LVDS^LVPECL |
Programmability | EEPROM^Pin configuration^Serial Interface |
VCC core | 1.8^2.5^3.3 |
VCC out | 1.8^2.5^3.3 |
Operating temperature range | -40 to 85 |
Package size: mm2:W x L (PKG) | [pf]24VQFN[/pf]: 16 mm2: 4 x 4 (VQFN|24) |
Approx. price | 2.50 | 1ku |
Input level | XTAL |
Features | I2C^Pin Programming |
Package Group | VQFN|24 |
Rating | Catalog |