TICPAL22V10Z-25C - EPIC<TM> CMOS Programmable Array Logic Circuits

The CMOS PLD devices feature variable product terms, flexible outputs, and virtually zero standby power. It combines TI's EPIC^TM (Enhanced Processed Implanted CMOS) process with ultraviolet-light-erasable EPROM technology. Each output has an output logic macrocell (OLM) configuration allowing for user definition of the output type. This device provides reliable, low-power substitutes for numerous high-performance TTL PLDs with gate complexities between 300 and 800 gates.

The TICPAL22V10Z has 12 dedicated inputs and 10 user-definable outputs. Individual outputs can be programmed as registered or combinational and inverting or noninverting as shown in the OLM diagram. These ten outputs are enabled through the use of individual product terms.

The variable product-term distribution on this device removes rigid limitation to a maximum of eight product terms per output. This technique allocates from 8 to 16 logical product terms to each output for an average of 12 product terms per output. The variable allocation of product terms allows for far more complex functions to be implemented in this device than in previously available devices.

With features such as the programable OLMs and the variable product-term distribution, the TICPAL22V10Z offers quick design and development of custom LSI functions. Since each of the ten output pins may be individually configured as inputs on either a temporary or permanent basis, functions requiring up to 21 inputs and a single output or down to 12 inputs and 10 outputs can be implemented with this device.

Design complexity is enhanced by the addition of synchronous set and asynchronous reset product terms. These functions are common to all registers. When the synchronous set product term is a logic 1, the output registers are loaded with a logic 1 on the next low-to-high clock transition. When the asynchronous reset product term is a logic 1, the output registers are loaded with a logic 0 independently of the clock. The output logic level after set or reset will depend on the polarity selected during programming.

Output registers of this device can be preloaded to any desired state during testing, thus allowing for full logical verification during product testing.

The TICPAL22V10Z has internal electrostatic discharge (ESD) protection circuits and has been classified with a 2000-V ESD rating tested under MIL-STD-883C, Method 3015.6. However, care should be exercised in handling these devices, as exposure to ESD may result in a degradation of the device parametric performance.

The floating-gate programmable cells allow the devices to be fully programmed and tested before assembly to assure high field programming yield and functionality. They are then erased by ultraviolet light before packaging.

The TICPAL22V10Z-25C is characterized for operation from 0°C to 75°C. The TICPAL22V10Z-30I is characterized for operation from –40°C to 85°C.

Products containing the "TICPAL22V10Z-25C" keyword are: TICPAL22V10Z-25C , TICPAL22V10Z-25CF , TICPAL22V10Z-25CFN , TICPAL22V10Z-25CJTL , TICPAL22V10Z-25CNT , TICPAL22V10Z-25CNT

• 24-Pin Advanced CMOS PLD
• Virtually Zero Standby Power
• Propagation Delay Time:
  • I, I/O to I/O in the Turbo Mode
    • –25C . . . 25 ns Max
    • –30I . . . 30 ns Max
  • I, I/O to I/O in the Zero-Power Mode
    • –25C . . . 35 ns Max
    • –30I . . . 40 ns Max
  • CLK to Q
    • –25C . . . 15 ns Max
    • –30I . . . 20 ns Max
• Variable Product Term Distribution Allows More Complex Functions to Be Implemented
• Each Output is User-Programmable for Registered or Combinatorial Operation, Polarity,
  and Output Enable Control
• Extra Terms Provide Logical Synchronous Set and Asynchronous Reset Capability
• Preload Capability on All Registered Outputs Allow for Improved Device Testing
• UV Light Erasable Cell Technology Allows for:
  Reconfigurable Logic
  Reprogrammable Cells
  Full Factory Testing for High Programming Yield
• Programmable Design Security Bit Prevents Copying of Logic Stored in Device
• Package Options Include Plastic Dual-In-Line and Clip Carrier [for One-Time-Programmable (OTP) Devices]
  and Ceramic Dual-In-Line Windowed Package

AVAILABLE OPTIONS

		PACKAGE TYPE
TA RANGE		CERAMIC WINDOWED DUAL-IN-LINE (JTL)		PLASTIC DUAL-IN-LINE (NT)		PLASTIC CHIP CARRIER (FN)
0°C to 75°C		TICPAL22V10Z-25CJTL		TICPAL22V10Z-25CNT		TICPAL22V10Z-25CFN
–40°C to 85°C		NA		TICPAL22V10Z-30INT		TICPAL22V10Z-30IFN

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