Each of these data selectors/multiplexers contains inverters and drivers to supply full binary decoding data selection to the AND-OR gates. Separate output-control inputs are provided for each of the two 4-line sections.
The 3-state outputs can interface with and drive data lines of bus-organized systems. With all but one of the common outputs disabled (in the high-impedance state), the low impedance of the single enabled output drives the bus line to a high or low logic level. Each output has its own output-enable (OE)\ input. The outputs are disabled when their respective OE\ is high.
Products containing the "SN74HC253" keyword are: SN74HC253AN , SN74HC253D , SN74HC253D , SN74HC253DBR , SN74HC253DBR , SN74HC253DBR SSOP16 , SN74HC253DBRE4 , SN74HC253DBRG4 , SN74HC253DR , SN74HC253DR , SN74HC253DR REV. E , SN74HC253DRE4 , SN74HC253DRG4 , SN74HC253DRG4 , SN74HC253DT , SN74HC253DT , SN74HC253N , SN74HC253N , SN74HC253N(N , SN74HC253NE4Status | ACTIVE |
SubFamily | Encoders & decoders |
Technology Family | HC |
VCC | 6 |
Bits | 4 |
Voltage | 3.3^5 |
F @ nom voltage | 28 |
ICC @ nom voltage | 0.08 |
tpd @ Nom Voltage | 38 |
Rating | Catalog |
Operating temperature range | -40 to 85 |
Package Group | PDIP|16 |
Package size: mm2:W x L (PKG) | See datasheet (PDIP) |
Approx. price | 0.14 | 1ku |